Explain 8259 interrupt controller with the help of block diagram.
It contains following blocks :
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| Functional block diagram of 8259 interrupt controller |
- Data bus buffer : It is used to transfer data between microprocessor and internal bus.
- Control logic : It generates an INT signal. In response to an INTA signal, it releases three byte CALL address or one byte vector number. It controls read/write control logic, cascade buffer/comparator, in service register, priority resolver and IRR.
- Cascade buffer and comparator : In master mode, it functions as a cascaded buffer. The cascaded buffers outputs slave identification number on cascade lines. In slave mode, it functions as a comparator. The comparator reads slave identification number from cascade lines and compares this number with its internal identification number. In buffered mode it generates an EN signal.
- Read/write logic : It sets the direction of data bus buffer. It controls all internal read/write operations. It contain initialisation and operation command register.
- IRR(Interrupt Request Register) : It is used to store all pending interrupt requests. Each bit of this register is set at the rising edge or at the high level of the corresponding interrupt request line. The microprocessor can read contents of this register by issuing appropriate, command word.
- InSR (In-Service Register) : It is used to store all interrupt levels currently being serviced. Each bit of this register is set by priority resolver and reset by end of interrupt command word. The microprocessor can read contents of this register by issuing appropriate command word.
- IMR (Interrupt Mask Register) : It is a programmable register. It is used to mask unwanted interrupt request, by writing command word. The microprocessor can read contents of this register without issuing any command word.
- Priority resolver : It determines the priorities of the bit set in the IRR. To make decision, the priority resolver looks at the ISR. If the higher priority bit in the InSR is set then it ignores the new request. If the priority revolvers finds that the new interrupt has a higher priority than the highest priority interrupt currently being serviced and the new interrupt is not in service, then it will set appropriate bit in the InSR and send the INT signal to the microprocessor for new interrupt request.
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